http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53949
--- Comment #11 from Oleg Endo <olegendo at gcc dot gnu.org> ---
Another question is whether the following is OK to do on all SH
implementations:
int test33 (int x, int y, int z)
{
return x * y + z;
}
currently compiles:
mul.l r5,r4
sts macl,r0
rts
add r6,r0
could also be done as:
lds r6,macl
mov.l r4,@-r15
mov.l r5,@-r15
mac.l @r15+,@r15+
rts
sts macl,r0
This assumes that a mac insn with both address operands being the same works
exactly as it's described in the Renesas manuals:
tempn = Read_32 (R[n]);
R[n] += 4;
tempm = Read_32 (R[m]);
R[m] += 4;
However, I don't know whether this is true for all SH implementations.
