http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59405
--- Comment #7 from Uroš Bizjak <ubizjak at gmail dot com> --- (In reply to H.J. Lu from comment #6) > I think this is a dup of PR48397. No, this one happens due to missing interdependencies between x87 and MMX registers. We could make all MMX instructions dependant on st(0) register, but this would mean that no MMX instruction whatsoever will be reordered.
