http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53976
--- Comment #6 from Oleg Endo <olegendo at gcc dot gnu.org> ---
(In reply to Oleg Endo from comment #4)
> One option to get rid of the redundant clrt and sett in BBs that are reached
> with a conditional branch would be to add an SH specific RTL pass that
> analyses the BBs and eliminates the insns in question.
>
> Another option could be to try and inject artificial sett / clrt insns at
> the start of BBs that are reached by conditional branches, and then split
> them away to nops or output empty asm with insn length 0. The idea would be
> to let other already existing RTL passes figure out the redundant T bit sets.
I've decided to do it with an RTL pass, as it's easier and less obscure.
The initial version committed in r205191 only eliminates redundant sett / clrt
insns. However, there are also some opportunities to e.g. hoist sett / clrt
insns out of loops:
long long test0 (long long* a, unsigned int c)
{
long long s = 0;
do s += *a++; while (--c);
return s;
}
Currently compiles to:
_test0:
mov #0,r0
mov #0,r1
.align 2
.L3:
mov.l @r4+,r2
mov.l @r4+,r3
clrt
addc r3,r1
addc r2,r0
add #-1,r5
tst r5,r5
bf .L3
rts
nop
The previous T bit value at the clrt insn in the loop basic block is currently
detected to have an unknown value from the first basic block and value = 0
after the end of the loop.
In this case the clrt insn can be removed from the loop and put into the first
basic block:
_test0:
mov #0,r0
mov #0,r1
clrt
.align 2
.L3:
mov.l @r4+,r2
mov.l @r4+,r3
addc r3,r1
addc r2,r0
add #-1,r5
tst r5,r5
bf .L3
rts
nop
