http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57748
--- Comment #12 from Bernd Edlinger <bernd.edlinger at hotmail dot de> --- (In reply to Martin Jambor from comment #11) >> Well, I believe this >> unaligned arrays are generally broken. >> >> consider this example: > With or > without the patch? If without the patch and you are reasonably confident > the output is indeed wrong, please open a new PR (and CC me, I'm interested) > because this particular ICE is certainly caused by trailing zero sized > arrays. I have tried reproducing your problem with x86_64 MMX vectors but > couldn't. I do not have access to an ARM machine to verify myself. Thanks. My example just produces wrong code. I tried everything, trunk with or without the patch does not matter, and it does not hit the ICE at all, but I tried to write the example to go into the if-statement here, and was somehow surprised, it produces wrong code instead. Your example aborts without the patch, and correctly produces 16 strb instructions with the patch. That means that store_field can handle unaligned address in to_rtx in *some* cases. Is this if-statement a work around for something, that should have been fixed in store_field instead? I'm chasing problems with unaligned structures that exist on the ARM GCC but not on Intel. All that started probably in 2011 with GCC 4.6, and meanwhile I'm concerned, because new processors arrive all the time and we must soon fix that or think of alternatives to GCC :-( I started with the discovery that volatile accesses to packed structure members are completely broken: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56341 However this seems to be a similar but completely different bug. I will file it today. PS: If you want to build a cross compiler for ARM, I can help you out with eCos sys-include headers, if that is present in the install tree, the cross-compiler can be built on X86_64 too.
