http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51708
--- Comment #3 from Oleg Endo <olegendo at gcc dot gnu.org> 2013-03-09 14:43:07 UTC --- (In reply to comment #2) > In order to 'force' the constant load to be CSE-ed the constant load and > dynamic shift patterns have to be emitted in the respective expanders, so that > the CSE pass can see the constant load. While implementing other patterns I've noticed that on SH there are quite a few cases, where certain constants can be formed during the combine pass when certain special case code patterns are discovered. One such frequent constant is the '-1' which is used together with the 'negc' insn to store the negated T bit into a register (SH2A 'movrt' insn). Another recent case came up when I was working on PR 55303 to add SH2A clip instructions. There, offset constants can be formed during the combine pass which also would not be CSE'd afterwards. I think it would be better to introduce a lightweight CSE pass for SH that is done after the first insn split pass after the combine pass. This would eliminate the need for complicated 'constant reservation' patterns.
