http://gcc.gnu.org/bugzilla/show_bug.cgi?id=54869
--- Comment #4 from Ulrich Drepper <drepper.fsp at gmail dot com> 2012-10-09 11:23:41 UTC --- (In reply to comment #0) > The new ext/random/simd_fast_mersenne_twister_engine/cons/default.cc testcase > FAILs on Solaris/SPARC (both 32 and 64-bit): That's expected. I mentioned when I posted the patches that the implementation is for little endian machines. I don't have access to any big endian machines and therefore didn't even try to make it work. It might be sufficient, at end of _M_gen_rand, to swap the order of the four 32-bit words in a 128-bit word. I never tested this, someone else will have to do this.