http://gcc.gnu.org/bugzilla/show_bug.cgi?id=54342
--- Comment #9 from H.J. Lu <hjl.tools at gmail dot com> 2012-08-23 13:58:15 UTC --- (In reply to comment #4) > I believe that OImode is currently handled inconsistently in the compiler, and > should be handled exactly in the way TImode is handled for xmm registers. > > There are some examples: > > -function_pass_avx256_p: OImode is handled together with VALID_AVX256_REG_MODE > in parallels, but not in registers. > -construct_container: OImode is created for container member > -ix86_hard_regno_mode_ok: OImode is handled together with > VALID_AVX256_REG_MODE. It is done on purpose. GCC needs an integer mode which is as wide as vector size for internal usage. > I think that OImode should be a member of VALID_AVX256_REG_MODE. If we want to do that, we need first to update psABI to specify how to pass and return OImode.
