http://gcc.gnu.org/bugzilla/show_bug.cgi?id=54133
--- Comment #2 from amker.cheng <amker.cheng at gmail dot com> 2012-08-01
07:49:51 UTC ---
I measured this kind of regression in benchmark CSiBE on
arm-none-eabi/cortex-m0 with Os optimization. Turns out most of the them are
relate to paramter/return register moving, like the reported case.
The logic is:
STEP1: At prologue or after call_insn, gcc saves parameter(or return) registers
in pseudos, then load it from the pseudo when need to use it(like calling
another function with the paramter).
For example:
{
rx <- r0
...
...
r0 <- rx
call another function
}
If instructions between saving and using do not clobber paramter register, the
hard register can be propagated to remove one redundant move instruction.
STEP2: copy propagation before IRA just ignore hard registers, so usually these
can only be done in regcprop.c after IRA.
BUT,
STEP3: register renaming does not honor any propagation opportunities and may
using r0 to rename, which introduces additional dependencies. It's a common
regression because regrename always select renaming register from 0 to
FIRST_PSEUOD_REG.
In experiment, if I disable r0/r1 from renaming, most regressions observed in
CSiBE are gone.
So how should this be fixed? Thanks.
