http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53937
Bug #: 53937 Summary: Pack'ing struct causes gcc to not recognize that an field's address is aligned Classification: Unclassified Product: gcc Version: 4.6.0 Status: UNCONFIRMED Severity: major Priority: P3 Component: c AssignedTo: unassig...@gcc.gnu.org ReportedBy: don.del...@gmail.com Created attachment 27779 --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=27779 Example C code Hello, When I pack my structure (use #pragma pack(1)), gcc compiler seems to not recognize that an field in that structure is aligned. This causes reading of aligned 32-bit fields, as 4 separate bytes. Apart from this is very not optimal code, this resets my PowerPC. This is because 32-bit registers can be accessed only as 32-bit words. Example code: ================ test.c ================ #pragma pack(1) typedef struct BasicStructPacked { int field; }BasicStructPacked; #pragma pack() typedef struct BasicStruct { int field; }BasicStruct; #define ADDRESS (0x1000) #define STRUCT_REGULAR (*((BasicStruct*)(ADDRESS))) #define STRUCT_PACKED (*((BasicStructPacked*)(ADDRESS))) void test_1() { STRUCT_PACKED.field = 0; } void test_2() { STRUCT_REGULAR.field = 0; } ======================================= This code generates the following assembler: ================ test.s ================ (...) test_1: li 9,4096 li 0,0 stb 0,0(9) stb 0,1(9) stb 0,2(9) stb 0,3(9) blr (...) test_2: li 0,0 li 9,4096 stw 0,0(9) blr (...) ======================================= As you can see access to the aligned 32-bit field is done as 4 reads of one byte (function test_1) instead of reading of one 32-bit word as it is done in function test_2. Used compilation command: ...GCC/powerpc-eabispe/4_6_0/bin/powerpc-eabispe-gcc-4.6.0.exe -mstrict-align -Wall -Wextra -Os -c -S test.c Regards, Krzysiek