http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52352
--- Comment #11 from H.J. Lu <hjl.tools at gmail dot com> 2012-02-24 19:14:19
UTC ---
(In reply to comment #10)
>
>
> But this is the _address_ that we are talking, see the "MEM" RTX. So,
> following
> (untested) patch can help - access is in PTR mode, and "a" modifier should
> handle this without problems.
>
> --cut here--
> Index: config/i386/i386.md
> ===================================================================
> --- config/i386/i386.md (revision 184560)
> +++ config/i386/i386.md (working copy)
> @@ -2360,7 +2360,7 @@
> ;; We fake an second form of instruction to force reload to load address
> ;; into register when rax is not available
> (define_insn "*movabs<mode>_1"
> - [(set (mem:SWI1248x (match_operand:DI 0 "x86_64_movabs_operand" "i,r"))
> + [(set (mem:SWI1248x (match_operand:PTR 0 "x86_64_movabs_operand" "i,r"))
> (match_operand:SWI1248x 1 "nonmemory_operand" "a,er"))]
> "TARGET_64BIT && ix86_check_movabs (insn, 0)"
> "@
> @@ -2375,7 +2375,7 @@
>
> (define_insn "*movabs<mode>_2"
> [(set (match_operand:SWI1248x 0 "register_operand" "=a,r")
> - (mem:SWI1248x (match_operand:DI 1 "x86_64_movabs_operand" "i,r")))]
> + (mem:SWI1248x (match_operand:PTR 1 "x86_64_movabs_operand" "i,r")))]
> "TARGET_64BIT && ix86_check_movabs (insn, 1)"
> "@
> movabs{<imodesuffix>}\t{%P1, %0|%0, %P1}
> --cut here--
I checked a similar fix into hjl/x32/addr32, hjl/x32/gcc-4_6-branch and
hjl/x32/gcc-4_6-branch+mx32 branches. I also added "I" code to print
constant address as positive 32bit integer for x32:
http://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=c6d9aee05cb3bfbe3c2a1b63f3f842e8d3fcb8e0
I used :P instead of :PTR which will be removed when I submit patches
to use SImode for Pmode with x32.
