http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51337
Bug #: 51337
Summary: SH Target: Various testsuite ICEs for -m2a -O0
Classification: Unclassified
Product: gcc
Version: 4.7.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
AssignedTo: unassig...@gcc.gnu.org
ReportedBy: oleg.e...@t-online.de
CC: kkoj...@gcc.gnu.org
Target: sh2a-*-*
There are various testsuite ICEs for -m2a -mb -O0, which look similar to the
following:
gcc.c-torture/compile/20000923-1.c:
...: error: insn does not satisfy its constraints:
(insn 142 34 35 (set (mem/c:SI (plus:SI (reg/f:SI 14 r14)
(const_int 36 [0x24])) [0 %sfp+-16 S4 A32])
(reg:SI 150 fpul)) ... {movsi_ie}
(nil))
...: internal compiler error: in extract_constrain_insn_cached, at recog.c:2052
The problem seems to be the movsi_ie insn, for which reload thinks it is
possible to load the FPUL register from a stack allocated reg using SImode
displacement addressing, which is actually not possible.
The following patch seems to help the issues...
--- gcc/config/sh/sh.c.orig 2011-11-28 10:03:04.000000000 +0900
+++ gcc/config/sh/sh.c 2011-11-28 15:09:01.000000000 +0900
@@ -12432,6 +12432,10 @@ sh_secondary_reload (bool in_p, rtx x, r
if (rclass != GENERAL_REGS && REG_P (x)
&& TARGET_REGISTER_P (REGNO (x)))
return GENERAL_REGS;
+ /* If here fall back to loading FPUL register through general regs.
+ Happens when FPUL has to be loaded from a reg allocated on the stack. */
+ if (rclass == FPUL_REGS && !REG_P (x))
+ return GENERAL_REGS;
return NO_REGS;
}
However, I think the following should be a better way to check the condition in
question...
+ if (rclass == FPUL_REGS && true_regnum (x) == -1)
+ return GENERAL_REGS;
I'll submit a patch once testing is completed.
