http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50427
Bug #: 50427
Summary: IRA fails to detect conflict
Classification: Unclassified
Product: gcc
Version: 4.6.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: rtl-optimization
AssignedTo: unassig...@gcc.gnu.org
ReportedBy: big...@acm.org
Created attachment 25299
--> http://gcc.gnu.org/bugzilla/attachment.cgi?id=25299
C source, intermediate dump files, build command
Per discussion on gcc email list, this may be a bug in gcc rather than in
the msp430 back-end. Any assistance in isolating it would be welcome. gcc
with the msp430 back-end integrated is available at
git://mspgcc.git.sourceforge.net/gitroot/mspgcc/gcc in branch master.
In the msp430 back end, hard registers 4 through 15 are HImode, with
adjacent register sequences used for SImode and DImode. In preparation for
a library call, I'm emitting RTL that assigns values directly to reg:SI 4.
Despite that, in gcc 4.5.x and 4.6.x IRA choses reg:HI 4 as the destination
for a pseudo-register for a preceding assignment, and does nothing to
preserve the value over the span where the register is part of an SI value.
Attached is a sample program and the dumps from what appear to be relevant
phases. I can provide any further details required.
