[Bug rtl-optimization/50110] Endian reversal when adding extzv instruction

[david.meggy at icron dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50110

--- Comment #1 from David Meggy <david.meggy at icron dot com> 2011-08-17 
19:18:21 UTC ---
When I compile with with -da to dump all the temporary files the endian
reversal seems to happen in the .179r.combine file.

The following block of code is in the .178r.dce file


(insn 6 3 7 2 (set (reg:SI 114)
        (mem/s:SI (reg/v/f:SI 111 [ arg ]) [0+0 S4 A32])) davidm.c:13 39
{*movsi_insn}
     (expr_list:REG_DEAD (reg/v/f:SI 111 [ arg ])
        (nil)))

(insn 7 6 9 2 (set (reg:SI 113)
        (lshiftrt:SI (reg:SI 114)
            (const_int 26 [0x1a]))) davidm.c:13 258 {lshrsi3}
     (expr_list:REG_DEAD (reg:SI 114)
        (nil)))

(insn 9 7 10 2 (set (reg:SI 116)
        (and:SI (reg:SI 113)
            (const_int 3 [0x3]))) davidm.c:13 166 {andsi3}
     (expr_list:REG_DEAD (reg:SI 113)
        (nil)))

(insn 10 9 15 2 (set (reg:SI 112)
        (zero_extend:SI (subreg:QI (reg:SI 116) 3))) davidm.c:13 91
{*zero_extendqisi2_insn}
     (expr_list:REG_DEAD (reg:SI 116)
        (nil)))

(insn 15 10 18 2 (set (reg/i:SI 24 %i0)
        (reg:SI 112)) davidm.c:13 39 {*movsi_insn}
     (expr_list:REG_DEAD (reg:SI 112)
        (nil)))

which contains a lshrsi3 and andsi3 (not being familar with GCC internals, I
presume this is right shift 26 followed by and of 0x3).  Which looks correct

In the .179r.combine file following snippet is present

(insn 6 3 7 2 (set (reg:SI 114)
        (mem/s:SI (reg:SI 24 %i0 [ arg ]) [0+0 S4 A32])) davidm.c:13 39
{*movsi_insn}
     (expr_list:REG_DEAD (reg:SI 24 %i0 [ arg ])
        (nil)))

(note 7 6 9 2 NOTE_INSN_DELETED)

(note 9 7 10 2 NOTE_INSN_DELETED)

(note 10 9 15 2 NOTE_INSN_DELETED)

(insn 15 10 18 2 (set (reg/i:SI 24 %i0)
        (zero_extract:SI (reg:SI 114)
            (const_int 2 [0x2])
            (const_int 4 [0x4]))) davidm.c:13 88 {extzvsi}
     (expr_list:REG_DEAD (reg:SI 114)
        (nil)))


Which appears that this pass in the compiler swapped the endian as the extzvsi
instruction is now using the constants 2 and 4, which would represent a little
endian bitfield structure.