http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47825
H.J. Lu <hjl.tools at gmail dot com> changed:
What |Removed |Added
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CC|hjl at gcc dot gnu.org |hjl.tools at gmail dot com,
| |ubizjak at gmail dot com
--- Comment #6 from H.J. Lu <hjl.tools at gmail dot com> 2011-02-21 13:53:02
UTC ---
(In reply to comment #5)
> /* Load four SPFP values from P. The address must be 16-byte aligned. */
> extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__,
> __artificial__))
> _mm_load_ps (float const *__P)
> {
> return (__m128) *(__v4sf *)__P;
> }
>
>
> re-opening to investigate that. HJ, are the SSE1 intrinsics not
> aliasing in the Intel API? The above snippets are from trunk.
It is a bug and should be fixed.
