[Bug middle-end/46555] New: PHI RTL expansion leads to CSiBE regression

[hubicka at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46555

           Summary: PHI RTL expansion leads to CSiBE regression
           Product: gcc
           Version: 4.6.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: middle-end
        AssignedTo: unassig...@gcc.gnu.org
        ReportedBy: hubi...@gcc.gnu.org


Created attachment 22452
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=22452
testcase (OpenTCP-1.0.4/icmp.c)

Hi,
the problem here seems to be worse regalloc and also
  # D.4060_6 = PHI <-1(2), -1(9), -1(11), -1(14), 0(15), -1(10)>
used to be optimized into since set of var to -1 (4 bytes), while now we
produce 3 different copies. 

Crossjumping would unify it, but very late in the game. The problem is that
ifcvt actually moves the set before conditoinal guarding the BB in question, so
the individual sets are drifted earlier to different places in the program.

Doing so might also complicate the regalloc.

Michael, perhaps we can tell out-of-ssa to unify such cases?  They are not that
infrequent (and I think old tree based out-of-ssa did that?)