------- Comment #8 from steven at gcc dot gnu dot org 2010-07-19 19:04 -------
Offending insns that are scheduled in the wrong order:
(insn:TI 28 48 9 2 vector-2.c:7 (set (reg:DI 9 r9 [+8 ])
(mem/c/i:DI (reg/f:DI 14 r14 [351]) [2 t+8 S8 A64])) 5 {movdi_internal}
(expr_list:REG_DEAD (reg/f:DI 14 r14 [351])
(nil)))
(insn 9 28 18 2 vector-2.c:5 (set (mem/s/j/c:SI (reg/f:DI 15 r15 [343]) [2 t+4
S4 A32])
(reg:SI 114 r34 [ a ])) 4 {movsi_internal} (expr_list:REG_DEAD (reg:SI
114 r34 [ a ])
(expr_list:REG_DEAD (reg/f:DI 15 r15 [343])
(nil))))
So the MEMs are:
load from "(mem/c/i:DI (reg/f:DI 14 r14 [351]) [2 t+8 S8 A64])"
store to "(mem/s/j/c:SI (reg/f:DI 15 r15 [343]) [2 t+4 S4 A32])"
There is no dependency of insn 28 on insn 9, even though this is a rather
obvious read-after-write dependency.
;; ======================================================
;; -- basic block 2 from 30 to 39 -- after reload
;; ======================================================
;; --------------- forward dependences: ------------
;; --- EBB Dependences --- from bb2 to bb2
;; insn code bb dep prio cost reservation
;; ---- ---- -- --- ---- ---- -----------
;; 30 5 2 0 3 1 2_A : 39 9 36 35
;; 29 5 2 0 2 1 2_A : 39 28 21
;; 35 5 2 1 2 1 2_M_only_um23 : 39 21 9 36
;; 36 5 2 2 1 1 2_M_only_um23 : 39 28 9
;; 9 4 2 3 0 1 2_M_only_um23 : 39
;; 21 5 2 2 1 1 2_M_only_um01 : 39 18 28
;; 28 5 2 3 0 1 2_M_only_um01 : 39 18
;; 18 -1 2 2 0 0 nothing : 39
;; 39 334 2 8 0 0 2_B :
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43494
