------- Comment #10 from dje at gcc dot gnu dot org 2010-05-21 00:28 -------
> On my mpc8321 it is a big difference(don't have numbers handy). Why would
> such a simply insn be a problem performance wise?
> I know the kernel still uses the carry insn's for calculating the
> Internet checksum.
mpc8321 is a relatively simplistic pipeline. Processors like POWER4, 5, 6, 7
may not have the same characteristics. Even with carry bit register renaming,
it is an extra input/output to a dedicated resource, an extra register port.
XLC currently avoids carry completely for POWER5 and POWER6:
.add32carry:
add r5,r3,r4
cmpl 0,0,r5,r4
addi r3,r5,1
bclr BO_IF,CR0_LT
ori r3,r5,0x0000
blr
One cannot assume that fewer UISA instructions equates with fewer
microarchitecture operations and faster performance.
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43892
