------- Comment #2 from siarhei dot siamashka at gmail dot com 2010-04-12 05:26 ------- (In reply to comment #1) > mov r3, #0 > vdup.32 d16, r3
Also maybe "veor.32 d16, d16, d16" here? Or drop this NEON register initialization completely because it is a redundant operation and was not explicitly requested in the original C code? After all, from IHI0042D_aapcs.pdf: "The FPSCR is the only status register that may be accessed by conforming code. It is a global register with the following properties: * The condition code bits (28-31), the cumulative saturation (QC) bit (27) and the cumulative exception-status bits (0-4) are not preserved across a public interface." and from ARM ARM: "Advanced SIMD arithmetic always uses untrapped exception handling" Tracking the cumulative exception-status bits may be tricky in general (using ununitialized value for NEON arithmetics can set them arbitrarily), but as long as they are not used in any way in the function itself, they are irrelevant. -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43364
