------- Comment #1 from ubizjak at gmail dot com 2010-03-25 13:10 -------
Vector shift-by-scalar instructions use SImode for count operand to separate
them from vector-by-vector shift instructions.
Following patch helps in this case:
Index: config/i386/sse.md
===================================================================
--- config/i386/sse.md (revision 157720)
+++ config/i386/sse.md (working copy)
@@ -5987,6 +5987,18 @@
(set_attr "length_immediate" "1")
(set_attr "mode" "TI")])
+(define_insn "*ashl<mode>3_1"
+ [(set (match_operand:SSEMODE248 0 "register_operand" "=x")
+ (ashift:SSEMODE248
+ (match_operand:SSEMODE248 1 "register_operand" "0")
+ (subreg:SI (match_operand:SSEMODE248 2 "register_operand" "x") 0)))]
+ "TARGET_SSE2"
+ "psll<ssevecsize>\t{%2, %0|%0, %2}"
+ [(set_attr "type" "sseishft")
+ (set_attr "prefix_data16" "1")
+ (set_attr "length_immediate" "0")
+ (set_attr "mode" "TI")])
+
(define_insn "ashl<mode>3"
[(set (match_operand:SSEMODE248 0 "register_operand" "=x")
(ashift:SSEMODE248
--cut here--
and produces:
pxor %xmm1, %xmm1
movdqa %xmm1, %xmm0
pcmpeqb %xmm1, %xmm0
pabsb %xmm0, %xmm2
psadbw %xmm1, %xmm2
movdqa %xmm2, -24(%rsp)
psllq %xmm2, %xmm0
ret
Two extra movdqa moves are generated in the ira pass for some reason.
13 NOTE_INSN_DELETED
15 xmm2:V2DI=unspec[xmm2:V16QI,xmm1:V16QI] 46
32 [sp:DI-0x18]=xmm2:V2DI
33 xmm2:V2DI=[sp:DI-0x18]
18 xmm0:V2DI=xmm0:V2DI<<xmm2:V2DI#0
27 use xmm0:V2DI
I have cc'd RA maintainer, perhaps he can explain these extra moves.
--
ubizjak at gmail dot com changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |vmakarov at gcc dot gnu dot
| |org
Status|UNCONFIRMED |NEW
Component|middle-end |target
Ever Confirmed|0 |1
Last reconfirmed|0000-00-00 00:00:00 |2010-03-25 13:10:23
date| |
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43514
