------- Comment #3 from siarhei dot siamashka at gmail dot com 2010-03-14
12:44 -------
As of today, gcc seems to be clever enough to deduct whether to use single
precision or double precision VFP register when given "w" constraint (so P
modifier is not strictly needed). This behavior seems to have been introduced
in 4.3.2 gcc version.
However, trying to force double precision variables into specific VFP registers
breaks it:
/************/
#include <stdio.h>
#include <stdint.h>
inline int32_t double_to_fixed_16_16(double dbl)
{
int32_t fix;
register double tmp asm ("d0") = dbl;
asm volatile (
"vcvt.s32.f64 %1, %1, #16\n"
"vmov.f32 %0, %1[0]\n"
: "=r" (fix), "+&w" (tmp)
);
return fix;
}
int main()
{
int32_t i = double_to_fixed_16_16(1.5);
printf("%08X\n", i);
}
/************/
/tmp/ccYfabov.s: Assembler messages:
/tmp/ccYfabov.s:24: Error: operand size must match register width --
`vcvt.s32.f64 s0,s0,#16'
/tmp/ccYfabov.s:25: Error: only D registers may be indexed -- `vmov.f32
r0,s0[0]'
/tmp/ccYfabov.s:45: Error: operand size must match register width --
`vcvt.s32.f64 s0,s0,#16'
/tmp/ccYfabov.s:46: Error: only D registers may be indexed -- `vmov.f32
r2,s0[0]'
Also NEON quad registers still need explicit 'q' modifier in inline assembly.
Updating the issue summary because NEON quad registers are now more problematic
than VFP doubles.
Thanks for your work on gcc. VFP/NEON support is slowly getting better over
time.
--
siarhei dot siamashka at gmail dot com changed:
What |Removed |Added
----------------------------------------------------------------------------
Summary|Missing documentation about |Missing documentation about
|the use of double precision |the use of ARM NEON quad
|floating point registers in |registers in inline asm
|inline asm arguments (VFP) |arguments
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=37188
