It seems post-increment addressing is not used as often as it could be,
resulting in sub-optimal code. Take this trivial test case:
char * func(char *p)
{
*p++=0;
*p++=0;
*p++=0;
return p;
}
On ARM, we end up with:
mov r2, #0 @ 6
mov r3, r0 @ 28
strb r2, [r3], #1
strb r2, [r0, #1]
add r0, r3, #2
strb r2, [r3, #1]
bx lr
The add instruction could be removed if all of the strb instructions used
post-increment addressing.
Problem seems to occur in both 4.4.0 and 4.5.0 latest svn. Also seems to effect
other targets that have post-increment addressing, not just ARM.
--
Summary: [4.4/4.5] post-increment addressing not used
Product: gcc
Version: 4.4.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: c
AssignedTo: unassigned at gcc dot gnu dot org
ReportedBy: jon at beniston dot com
GCC target triplet: arm-elf and others
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=42612
