The power7 code that was added in July, violates the powerpc ABI in two ways
due to the floating point registers overlap with the VSX registers.
1) HARD_REGNO_CALL_PART_CLOBBERED was not adjusted to disallow VSX registers
0..31 which overlap with the floating point registers to be live across
function calls. Thus the compiler might think that a VSX register might be
preserved across a call, when only the first double word will be. The Spec
2006 tests dealII, calculix, and GemsFDTD fail when compiled for vsx with some
compiler options.
2) The VRSAVE register is not set if a function uses VSX registers that overlap
with the floating point registers, because the register is only 32-bit and does
not have room to indicate additional vector registers that overlap with
floating point registers. The new ABI says that the VRSAVE only has to be
non-zero if vector registers are used.
I have patches for both of these problems that I am currently looking at.
--
Summary: Power7 code violates ABI
Product: gcc
Version: 4.5.0
Status: UNCONFIRMED
Severity: major
Priority: P3
Component: target
AssignedTo: meissner at gcc dot gnu dot org
ReportedBy: meissner at gcc dot gnu dot org
GCC build triplet: powerpc64-unknown-linux-gnu
GCC host triplet: powerpc64-unknown-linux-gnu
GCC target triplet: powerpc64-unknown-linux-gnu
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=41787
