------- Comment #5 from pinskia at gcc dot gnu dot org 2009-09-29 05:50 -------
PowerPC has the same issue. Instructions on PPC are all the same size so 3
adds are better than one add plus 3 register moves.
Here is a C example:
int f(int *a);
int g(int *a);
int h(int *a);
void hh(void)
{
int t;
f(&t);
g(&t);
h(&t);
}
--- CUT ---
Most RISC will have the same issue as most will have instructions which are
fixed length.
I bet this has to do with hard registers.
--
pinskia at gcc dot gnu dot org changed:
What |Removed |Added
----------------------------------------------------------------------------
Component|target |middle-end
GCC build triplet|i686-linux |
GCC target triplet|arm-eabi |arm-eabi, powerpc*-*-*
Keywords| |missed-optimization
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=40615
