------- Comment #13 from wvangulik at xs4all dot nl 2007-10-24 11:16 -------
(In reply to comment #10)
Something like this is smaller, faster and works for all registers (no need for
LD_regs). And could easily be writtin in to a insn:
; rOut: output register
; rIn: input register
; rIn, Z, N are clobbered, C is set
clzqi_init:
clr rOut ; clear to zero
neg rOut ; make -1, and set C (C used for garanteed termination)
clzqi_loop1:
inc rOut ; inc output (C not touched)
rol rIn ; push MSB into C
brcc clz_loop1 ; if C is cleared (msb was not set), continue loop
clzqi_end:
A clz on a hi/si/di would be almost the same. Extend the "rol rIn" to a rol per
sub_reg.
Of course there can be speed optimisation for hi/si/di, but for the AVR the
optimizer is in most cases set for size.
A library call to this is shorter but it may impose extra mov instruction to
fit the register constraints.
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=29524
