------- Comment #1 from rguenth at gcc dot gnu dot org 2007-07-06 12:54 -------
Confirmed. This needs VRP of bits. The IL we generate is currently
bool b3;
bool b5;
int D.2483;
int D.2482;
int D.2481;
<bb 2>:
D.2481_2 = a_1(D) & 32;
b5_3 = D.2481_2 != 0;
D.2482_4 = a_1(D) & 8;
b3_5 = D.2482_4 != 0;
D.2483_6 = b5_3 != b3_5;
return D.2483_6;
--
rguenth at gcc dot gnu dot org changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|UNCONFIRMED |NEW
Component|c++ |tree-optimization
Ever Confirmed|0 |1
Keywords| |missed-optimization
Last reconfirmed|0000-00-00 00:00:00 |2007-07-06 12:54:02
date| |
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=32648