------- Additional Comments From wilson at gcc dot gnu dot org 2005-08-12 23:25 ------- Checking the Intel IA-32 ASDM, it says that the DAZ bit was introduced in Pentium 4 and Xeon as an SSE2 extension, and that not even all Pentium 4 processors support it.
See Volume 1 Section 10.2.2.4 "Denormals-Are-Zeros", paragraphs 4 and 5. See also the section it refers to, Volume 1 Section 11.6.3 "Checking for the DAZ Flag in the MXCSR Register" which explains that the only safe way to use the DAZ bit is to first use FXSAVE, and then check the MXCSR_MASK. It says nothing special about the FZ bit, so that part is apparently OK. This Intel documentation is available from the Intel web site. -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=23360
