Compile this test with an ARM-targeted compiler. Using -O2, it works out OK;
but for -O0 or -O1 it doesn't. I originally encountered the bug in -O2 compiled
code, but a more complex testcase is probably necessary for that.
int bar(int *mem)
{
return ({ register int a_oldval asm ("r0");
register int a_tmp asm ("r3");
int a_oldval2 = 3;
__asm__ __volatile__ ("# Should be r0 - %0\n\t"
"# Should be r3 - %1"
: "=&r" (a_oldval), "=&r" (a_tmp)
: "r" (a_oldval2));
a_tmp; });
}
Everything is OK up until reload. Then this happens:
Spilling for insn 19.
Using reg 2 for reload 0
Spilling for insn 19.
Using reg 2 for reload 0
Reloads for insn # 19
Reload 0: reload_out (SI) = (reg/v:SI 3 r3 [ a_tmp ])
GENERAL_REGS, RELOAD_OTHER (opnum = 1)
reload_out_reg: (reg/v:SI 3 r3 [ a_tmp ])
reload_reg_rtx: (reg:SI 2 r2)
and the set of a_tmp is replaced by a set of r2. I can't figure out why
the reload was created.
--
Summary: Output register variable is reloaded into the wrong
register for asm
Product: gcc
Version: 4.1.0
Status: UNCONFIRMED
Severity: normal
Priority: P2
Component: rtl-optimization
AssignedTo: unassigned at gcc dot gnu dot org
ReportedBy: drow at gcc dot gnu dot org
CC: gcc-bugs at gcc dot gnu dot org
GCC target triplet: arm-none-linux-gnueabi
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=21223
