On Thu, Dec 19, 2024 at 03:49:31PM +0800, Jun Nie wrote:
> Move requreiment check to routine of every pipe check. There will be
> multiple SSPPs for quad-pipe case in future. Only check valid pipe
> as some pipes are for multi-rect or right half of screen that may
> not be used.
This highlights an issue in the current wide planes implelentation.
Please move this to the top of the series, provide a proper commit
message, describing the issue, and add a proper Fixes tag.
>
> Signed-off-by: Jun Nie <jun....@linaro.org>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 86
> +++++++++++++++----------------
> 1 file changed, 42 insertions(+), 44 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> index fca6e609898a6..1cd98892898a4 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
> @@ -730,12 +730,40 @@ static int dpu_plane_check_inline_rotation(struct
> dpu_plane *pdpu,
> static int dpu_plane_atomic_check_pipe(struct dpu_plane *pdpu,
> struct dpu_sw_pipe *pipe,
> struct dpu_sw_pipe_cfg *pipe_cfg,
> - const struct msm_format *fmt,
> - const struct drm_display_mode *mode)
> + const struct drm_display_mode *mode,
> + struct drm_plane_state *new_plane_state)
> {
> uint32_t min_src_size;
> struct dpu_kms *kms = _dpu_plane_get_kms(&pdpu->base);
> int ret;
> + const struct msm_format *fmt;
> + uint32_t supported_rotations;
> + const struct dpu_sspp_cfg *pipe_hw_caps;
> + const struct dpu_sspp_sub_blks *sblk;
> +
> + pipe_hw_caps = pipe->sspp->cap;
> + sblk = pipe->sspp->cap->sblk;
> +
> + /*
> + * We already have verified scaling against platform limitations.
> + * Now check if the SSPP supports scaling at all.
> + */
> + if (!sblk->scaler_blk.len &&
> + ((drm_rect_width(&new_plane_state->src) >> 16 !=
> + drm_rect_width(&new_plane_state->dst)) ||
> + (drm_rect_height(&new_plane_state->src) >> 16 !=
> + drm_rect_height(&new_plane_state->dst))))
> + return -ERANGE;
> +
> + fmt = msm_framebuffer_format(new_plane_state->fb);
> +
> + supported_rotations = DRM_MODE_REFLECT_MASK | DRM_MODE_ROTATE_0;
> +
> + if (pipe_hw_caps->features & BIT(DPU_SSPP_INLINE_ROTATION))
> + supported_rotations |= DRM_MODE_ROTATE_90;
> +
> + pipe_cfg->rotation = drm_rotation_simplify(new_plane_state->rotation,
> + supported_rotations);
>
> min_src_size = MSM_FORMAT_IS_YUV(fmt) ? 2 : 1;
>
> @@ -981,49 +1009,19 @@ static int dpu_plane_atomic_check_sspp(struct
> drm_plane *plane,
> drm_atomic_get_new_plane_state(state, plane);
> struct dpu_plane *pdpu = to_dpu_plane(plane);
> struct dpu_plane_state *pstate = to_dpu_plane_state(new_plane_state);
> - const struct msm_format *fmt;
> - struct dpu_sw_pipe *pipe = &pstate->pipe[0];
> - struct dpu_sw_pipe *r_pipe = &pstate->pipe[1];
> - struct dpu_sw_pipe_cfg *pipe_cfg = &pstate->pipe_cfg[0];
> - struct dpu_sw_pipe_cfg *r_pipe_cfg = &pstate->pipe_cfg[1];
> - uint32_t supported_rotations;
> - const struct dpu_sspp_cfg *pipe_hw_caps;
> - const struct dpu_sspp_sub_blks *sblk;
> - int ret = 0;
> -
> - pipe_hw_caps = pipe->sspp->cap;
> - sblk = pipe->sspp->cap->sblk;
> -
> - /*
> - * We already have verified scaling against platform limitations.
> - * Now check if the SSPP supports scaling at all.
> - */
> - if (!sblk->scaler_blk.len &&
> - ((drm_rect_width(&new_plane_state->src) >> 16 !=
> - drm_rect_width(&new_plane_state->dst)) ||
> - (drm_rect_height(&new_plane_state->src) >> 16 !=
> - drm_rect_height(&new_plane_state->dst))))
> - return -ERANGE;
> -
> - fmt = msm_framebuffer_format(new_plane_state->fb);
> -
> - supported_rotations = DRM_MODE_REFLECT_MASK | DRM_MODE_ROTATE_0;
> -
> - if (pipe_hw_caps->features & BIT(DPU_SSPP_INLINE_ROTATION))
> - supported_rotations |= DRM_MODE_ROTATE_90;
> -
> - pipe_cfg->rotation = drm_rotation_simplify(new_plane_state->rotation,
> - supported_rotations);
> - r_pipe_cfg->rotation = pipe_cfg->rotation;
> -
> - ret = dpu_plane_atomic_check_pipe(pdpu, pipe, pipe_cfg, fmt,
> - &crtc_state->adjusted_mode);
> - if (ret)
> - return ret;
> + struct dpu_sw_pipe *pipe;
> + struct dpu_sw_pipe_cfg *pipe_cfg;
> + int ret = 0, i;
>
> - if (drm_rect_width(&r_pipe_cfg->src_rect) != 0) {
> - ret = dpu_plane_atomic_check_pipe(pdpu, r_pipe, r_pipe_cfg, fmt,
> - &crtc_state->adjusted_mode);
> + for (i = 0; i < PIPES_PER_PLANE; i++) {
> + pipe = &pstate->pipe[i];
> + pipe_cfg = &pstate->pipe_cfg[i];
> + if (!pipe_cfg->valid || !pipe->sspp)
> + continue;
> + DPU_DEBUG_PLANE(pdpu, "pipe %d is in use, validate it\n", i);
> + ret = dpu_plane_atomic_check_pipe(pdpu, pipe, pipe_cfg,
> + &crtc_state->adjusted_mode,
> + new_plane_state);
> if (ret)
> return ret;
> }
>
> --
> 2.34.1
>
--
With best wishes
Dmitry
