On 12/13/2024 4:27 PM, Konrad Dybcio wrote:
> On 13.12.2024 11:35 AM, Akhil P Oommen wrote:
>> From: Jie Zhang <quic_ji...@quicinc.com>
>>
>> Add gpu and gmu nodes for qcs615 chipset.
>>
>> Signed-off-by: Jie Zhang <quic_ji...@quicinc.com>
>> Signed-off-by: Akhil P Oommen <quic_akhi...@quicinc.com>
>> Reviewed-by: Dmitry Baryshkov <dmitry.barysh...@linaro.org>
>> ---
>> arch/arm64/boot/dts/qcom/qcs615.dtsi | 88
>> ++++++++++++++++++++++++++++++++++++
>> 1 file changed, 88 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi
>> b/arch/arm64/boot/dts/qcom/qcs615.dtsi
>> index 8df26efde3fd..dee5d3be4aa3 100644
>> --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi
>> @@ -387,6 +387,11 @@ smem_region: smem@86000000 {
>> no-map;
>> hwlocks = <&tcsr_mutex 3>;
>> };
>> +
>> + pil_gpu_mem: pil-gpu@97715000 {
>> + reg = <0x0 0x97715000 0x0 0x2000>;
>> + no-map;
>> + };
>> };
>>
>> soc: soc@0 {
>> @@ -508,6 +513,89 @@ qup_uart0_rx: qup-uart0-rx-state {
>> };
>> };
>>
>> + gpu: gpu@5000000 {
>> + compatible = "qcom,adreno-612.0", "qcom,adreno";
>> + reg = <0x0 0x05000000 0x0 0x90000>;
>> + reg-names = "kgsl_3d0_reg_memory";
>> +
>> + clocks = <&gpucc GPU_CC_GX_GFX3D_CLK>,
>> + <&gcc GCC_DDRSS_GPU_AXI_CLK>,
>> + <&gcc GCC_GPU_MEMNOC_GFX_CLK>,
>> + <&gpucc GPU_CC_CX_GMU_CLK>,
>> + <&gpucc GPU_CC_CXO_CLK>;
>> + clock-names = "core",
>> + "mem_iface",
>> + "alt_mem_iface",
>> + "gmu",
>> + "xo";
>> +
>> + interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>;
>> +
>> + interconnects = <&gem_noc MASTER_GFX3D
>> QCOM_ICC_TAG_ALWAYS
>> + &mc_virt SLAVE_EBI1
>> QCOM_ICC_TAG_ALWAYS>;
>> + interconnect-names = "gfx-mem";
>> +
>> + iommus = <&adreno_smmu 0x0 0x401>;
>
> No LPAC context?
Nope. A6XX_GEN1 family here.
>
>
>> + operating-points-v2 = <&gpu_opp_table>;
>> + power-domains = <&rpmhpd RPMHPD_CX>;
>> + qcom,gmu = <&rgmu>;
>> +
>> + #cooling-cells = <2>;
>> +
>> + status = "disabled";
>> +
>> + gpu_zap_shader: zap-shader {
>> + memory-region = <&pil_gpu_mem>;
>> + };
>> +
>> + gpu_opp_table: opp-table {
>> + compatible = "operating-points-v2";
>> +
>> + opp-435000000 {
>> + opp-hz = /bits/ 64 <435000000>;
>> + required-opps = <&rpmhpd_opp_svs>;
>> + opp-peak-kBps = <3000000>;
>> + };
>
> I'm also seeing 290 MHz @ LOW_SVS
Likely because the downstream automotive driver didn't use that corner
for some reason. Let me check.
-Akhil
>
> Konrad
