[PATCH v3 2/3] drm/msm/mdss: reuse defined bitfields for UBWC 2.0

[Dmitry Baryshkov]

Follow other msm_mdss_setup_ubwc_dec_nn functions and use individual
bits instead of just specifying the value to be programmed to the
UBWC_STATIC register.

Signed-off-by: Dmitry Baryshkov <dmitry.barysh...@linaro.org>
---
 drivers/gpu/drm/msm/msm_mdss.c | 17 +++++++++++++----
 drivers/gpu/drm/msm/msm_mdss.h |  1 -
 2 files changed, 13 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index 
bb176178855cbe14386481d90bf70aa82be4d522..87ada64133924d712810c644a5ff660a082c2abd
 100644
--- a/drivers/gpu/drm/msm/msm_mdss.c
+++ b/drivers/gpu/drm/msm/msm_mdss.c
@@ -166,8 +166,16 @@ static int _msm_mdss_irq_domain_add(struct msm_mdss 
*msm_mdss)
 static void msm_mdss_setup_ubwc_dec_20(struct msm_mdss *msm_mdss)
 {
        const struct msm_mdss_data *data = msm_mdss->mdss_data;
+       u32 value = MDSS_UBWC_STATIC_UBWC_SWIZZLE(data->ubwc_swizzle) |
+                   MDSS_UBWC_STATIC_HIGHEST_BANK_BIT(data->highest_bank_bit);
 
-       writel_relaxed(data->ubwc_static, msm_mdss->mmio + 
REG_MDSS_UBWC_STATIC);
+       if (data->ubwc_bank_spread)
+               value |= MDSS_UBWC_STATIC_UBWC_BANK_SPREAD;
+
+       if (data->ubwc_enc_version == UBWC_1_0)
+               value |= MDSS_UBWC_STATIC_UBWC_MIN_ACC_LEN(1);
+
+       writel_relaxed(value, msm_mdss->mmio + REG_MDSS_UBWC_STATIC);
 }
 
 static void msm_mdss_setup_ubwc_dec_30(struct msm_mdss *msm_mdss)
@@ -587,7 +595,8 @@ static const struct msm_mdss_data sa8775p_data = {
 static const struct msm_mdss_data sc7180_data = {
        .ubwc_enc_version = UBWC_2_0,
        .ubwc_dec_version = UBWC_2_0,
-       .ubwc_static = 0x1e,
+       .ubwc_swizzle = 6,
+       .ubwc_bank_spread = true,
        .highest_bank_bit = 0x1,
        .reg_bus_bw = 76800,
 };
@@ -638,7 +647,7 @@ static const struct msm_mdss_data sm6350_data = {
        .ubwc_enc_version = UBWC_2_0,
        .ubwc_dec_version = UBWC_2_0,
        .ubwc_swizzle = 6,
-       .ubwc_static = 0x1e,
+       .ubwc_bank_spread = true,
        .highest_bank_bit = 1,
        .reg_bus_bw = 76800,
 };
@@ -661,7 +670,7 @@ static const struct msm_mdss_data sm6115_data = {
        .ubwc_enc_version = UBWC_1_0,
        .ubwc_dec_version = UBWC_2_0,
        .ubwc_swizzle = 7,
-       .ubwc_static = 0x11f,
+       .ubwc_bank_spread = true,
        .highest_bank_bit = 0x1,
        .reg_bus_bw = 76800,
 };
diff --git a/drivers/gpu/drm/msm/msm_mdss.h b/drivers/gpu/drm/msm/msm_mdss.h
index 
737ea6c39271ca85ab82b72914acb9781a7a2cb3..1714bb41b838c33f3da19d93c5c1f5c53cfbdbab
 100644
--- a/drivers/gpu/drm/msm/msm_mdss.h
+++ b/drivers/gpu/drm/msm/msm_mdss.h
@@ -11,7 +11,6 @@ struct msm_mdss_data {
        /* can be read from register 0x58 */
        u32 ubwc_dec_version;
        u32 ubwc_swizzle;
-       u32 ubwc_static;
        u32 highest_bank_bit;
        bool ubwc_bank_spread;
        u32 macrotile_mode;

-- 
2.39.5