For concurrent writeback, the real time encoder is responsible for
trigger flush and trigger start. Return early for trigger start and
trigger flush for the concurrent writeback encoders.

Signed-off-by: Jessica Zhang <quic_jessz...@quicinc.com>
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index ac3ff13b65c3..87eaaf1196c2 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -1488,6 +1488,7 @@ static void dpu_encoder_off_work(struct work_struct *work)
 static void _dpu_encoder_trigger_flush(struct drm_encoder *drm_enc,
                struct dpu_encoder_phys *phys, uint32_t extra_flush_bits)
 {
+       struct dpu_encoder_virt *dpu_enc = to_dpu_encoder_virt(drm_enc);
        struct dpu_hw_ctl *ctl;
        int pending_kickoff_cnt;
        u32 ret = UINT_MAX;
@@ -1505,6 +1506,15 @@ static void _dpu_encoder_trigger_flush(struct 
drm_encoder *drm_enc,
 
        pending_kickoff_cnt = dpu_encoder_phys_inc_pending(phys);
 
+       /* Return early if encoder is writeback and in clone mode */
+       if (drm_enc->encoder_type == DRM_MODE_ENCODER_VIRTUAL &&
+           dpu_enc->cwb_mask) {
+               DPU_DEBUG("encoder %d skip flush for concurrent writeback 
encoder\n",
+                               DRMID(drm_enc));
+               return;
+       }
+
+
        if (extra_flush_bits && ctl->ops.update_pending_flush)
                ctl->ops.update_pending_flush(ctl, extra_flush_bits);
 
@@ -1527,6 +1537,8 @@ static void _dpu_encoder_trigger_flush(struct drm_encoder 
*drm_enc,
  */
 static void _dpu_encoder_trigger_start(struct dpu_encoder_phys *phys)
 {
+       struct dpu_encoder_virt *dpu_enc = to_dpu_encoder_virt(phys->parent);
+
        if (!phys) {
                DPU_ERROR("invalid argument(s)\n");
                return;
@@ -1537,6 +1549,12 @@ static void _dpu_encoder_trigger_start(struct 
dpu_encoder_phys *phys)
                return;
        }
 
+       if (phys->parent->encoder_type == DRM_MODE_ENCODER_VIRTUAL &&
+           dpu_enc->cwb_mask) {
+               DPU_DEBUG("encoder %d CWB enabled, skipping\n", 
DRMID(phys->parent));
+               return;
+       }
+
        if (phys->ops.trigger_start && phys->enable_state != DPU_ENC_DISABLED)
                phys->ops.trigger_start(phys);
 }

-- 
2.34.1

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