Add the final "s" to the pgio properties and fix the invalid "enable"
name to the correct "wake", checked against the HDK8450 schematics.

Fixes: bc6588bc25fb ("arm64: dts: qcom: sm8450: add PCIe1 root device")
Signed-off-by: Neil Armstrong <neil.armstr...@linaro.org>
---
 arch/arm64/boot/dts/qcom/sm8450.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi 
b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 8ecc48c7c5ef..d964d3fbe20c 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -1908,8 +1908,8 @@ pcie1: pci@1c08000 {
                        phys = <&pcie1_lane>;
                        phy-names = "pciephy";
 
-                       perst-gpio = <&tlmm 97 GPIO_ACTIVE_LOW>;
-                       enable-gpio = <&tlmm 99 GPIO_ACTIVE_HIGH>;
+                       perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>;
+                       wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>;
 
                        pinctrl-names = "default";
                        pinctrl-0 = <&pcie1_default_state>;

-- 
2.34.1

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