Add dpu_dbg points across dpu driver to trigger dumps when critical
errors are hit.

Signed-off-by: Abhinav Kumar <abhin...@codeaurora.org>
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c          | 12 ++++++++++--
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c |  5 +++--
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c |  5 ++++-
 3 files changed, 17 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index f7f5c258b553..a2ee1af73c9f 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
- * Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2014-2018, 2020 The Linux Foundation. All rights reserved.
  * Copyright (C) 2013 Red Hat
  * Author: Rob Clark <robdcl...@gmail.com>
  */
@@ -26,6 +26,7 @@
 #include "dpu_crtc.h"
 #include "dpu_trace.h"
 #include "dpu_core_irq.h"
+#include "dpu_dbg.h"
 
 #define DPU_DEBUG_ENC(e, fmt, ...) DPU_DEBUG("enc%d " fmt,\
                (e) ? (e)->base.base.id : -1, ##__VA_ARGS__)
@@ -1313,6 +1314,11 @@ static void dpu_encoder_underrun_callback(struct 
drm_encoder *drm_enc,
 
        DPU_ATRACE_BEGIN("encoder_underrun_callback");
        atomic_inc(&phy_enc->underrun_cnt);
+
+       /* trigger dump only on the first underrun */
+       if (atomic_read(&phy_enc->underrun_cnt) == 1)
+               DPU_DBG_DUMP("all");
+
        trace_dpu_enc_underrun_cb(DRMID(drm_enc),
                                  atomic_read(&phy_enc->underrun_cnt));
        DPU_ATRACE_END("encoder_underrun_callback");
@@ -1553,8 +1559,10 @@ static void dpu_encoder_helper_hw_reset(struct 
dpu_encoder_phys *phys_enc)
                      ctl->idx);
 
        rc = ctl->ops.reset(ctl);
-       if (rc)
+       if (rc) {
                DPU_ERROR_ENC(dpu_enc, "ctl %d reset failure\n",  ctl->idx);
+               DPU_DBG_DUMP("all");
+       }
 
        phys_enc->enable_state = DPU_ENC_ENABLED;
 }
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
index 8493d68ad841..58f79557b560 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
- * Copyright (c) 2015-2018 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2015-2018, 2020 The Linux Foundation. All rights reserved.
  */
 
 #define pr_fmt(fmt)    "[drm:%s:%d] " fmt, __func__, __LINE__
@@ -9,6 +9,7 @@
 #include "dpu_core_irq.h"
 #include "dpu_formats.h"
 #include "dpu_trace.h"
+#include "dpu_dbg.h"
 
 #define DPU_DEBUG_CMDENC(e, fmt, ...) DPU_DEBUG("enc%d intf%d " fmt, \
                (e) && (e)->base.parent ? \
@@ -213,7 +214,7 @@ static int _dpu_encoder_phys_cmd_handle_ppdone_timeout(
                          phys_enc->hw_ctl->idx - CTL_0,
                          cmd_enc->pp_timeout_report_cnt,
                          atomic_read(&phys_enc->pending_kickoff_cnt));
-
+               DPU_DBG_DUMP("all");
                dpu_encoder_helper_unregister_irq(phys_enc, INTR_IDX_RDPTR);
        }
 
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
index 805e059b50b7..46c5320150fa 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
@@ -1,5 +1,5 @@
 // SPDX-License-Identifier: GPL-2.0-only
-/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015-2018, 2020 The Linux Foundation. All rights reserved.
  */
 
 #define pr_fmt(fmt)    "[drm:%s:%d] " fmt, __func__, __LINE__
@@ -8,6 +8,7 @@
 #include "dpu_core_irq.h"
 #include "dpu_formats.h"
 #include "dpu_trace.h"
+#include "dpu_dbg.h"
 
 #define DPU_DEBUG_VIDENC(e, fmt, ...) DPU_DEBUG("enc%d intf%d " fmt, \
                (e) && (e)->parent ? \
@@ -467,6 +468,7 @@ static void dpu_encoder_phys_vid_enable(struct 
dpu_encoder_phys *phys_enc)
                "update pending flush ctl %d flush_mask 0%x intf_mask 0x%x\n",
                ctl->idx - CTL_0, flush_mask, intf_flush_mask);
 
+       atomic_set(&phys_enc->underrun_cnt, 0);
 
        /* ctl_flush & timing engine enable will be triggered by framework */
        if (phys_enc->enable_state == DPU_ENC_DISABLED)
@@ -549,6 +551,7 @@ static void dpu_encoder_phys_vid_prepare_for_kickoff(
        if (rc) {
                DPU_ERROR_VIDENC(phys_enc, "ctl %d reset failure: %d\n",
                                ctl->idx, rc);
+               DPU_DBG_DUMP("all");
                dpu_encoder_helper_unregister_irq(phys_enc, INTR_IDX_VSYNC);
        }
 }
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

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