On Wednesday 30 March 2005 03:15 pm, Greg 'groggy' Lehey wrote: > On Wednesday, 30 March 2005 at 16:01:14 -0700, Scott Long wrote: > > Greg 'groggy' Lehey wrote: > >> On Wednesday, 30 March 2005 at 14:35:46 -0800, Steve Kargl wrote: > >>> On Thu, Mar 31, 2005 at 07:54:39AM +0930, Greg 'groggy' Lehey wrote: > >>>> None of these problems occur when I use 4 GB memory. About the > >>>> only strangeness, which seems to come from the BIOS, is that it > >>>> recognizes only 3.5 GB. If I put all DIMMS in, it recognizes > >>>> the full 8 GB memory. > >>> > >>> I had 4 bad out of 12 tested where the DIMMs were Crucial PC2700 > >>> 2GB Reg. ECC DIMMs. > >> > >> OK, this makes sense. It might also explain why the 4 GB > >> configuration only recognizes 3.5 GB. > > > > No, and I'm going to make this an FAQ and post it in a very obvious > > place, since 4+ GB is so easy to get and people don't seem to > > understand the PC architecture very well. > > That's not easy to understand when it's barely documented. Thanks > for the info: it helps a lot. > > This may still be a hint, though: that memory hole doesn't show up > during a boot with 8 GB RAM. How come? Is the system trying to map > RAM over the PCI hole?
Nope, its still there. When you boot -v, you'll see the hole in the "Physical memory chunk(s)" list. However, I suspect that some of the bioses will set the 4GB hole partition in the physical ram lower so that there will be 4.5GB of ram above the 4GB mark. I haven't looked too closely to see for sure. > It looks as if I should get a verbose boot listing with 8 GB. It'll > be a couple of hours before I find time to reboot this machine. In > the meantime, there's a verbose boot with 4 GB at > http://www.lemis.com/grog/Images/20050331/obelix-dmesg. I'm told it > shows a number of strange things, including incorrect reporting of > on-chip cache sizes. Nope, it is correct. You have 1MB of L2 cache. L1 data cache: 64 kbytes, 64 bytes/line, 1 lines/tag, 2-way associative L1 instruction cache: 64 kbytes, 64 bytes/line, 1 lines/tag, 2-way associative L2 unified cache: 1024 kbytes, 64 bytes/line, 1 lines/tag, 16-way associative > Greg > -- > See complete headers for address and phone numbers. -- Peter Wemm - [EMAIL PROTECTED]; [EMAIL PROTECTED]; [EMAIL PROTECTED] "All of this is for nothing if we don't go to the stars" - JMS/B5 _______________________________________________ freebsd-stable@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/freebsd-stable To unsubscribe, send any mail to "[EMAIL PROTECTED]"
