on 01/12/2012 01:50 Andreas Longwitz said the following:
[> "Andriy Gapon wrote" should have been present somewhere around here]
>> Looking at the code in ioapic_program_intpin() this seems to be possible 
>> indeed:
>>
>> /* Write the values to the APIC. */
>> intpin->io_lowreg = low;
>> ioapic_write(io->io_addr, IOAPIC_REDTBL_LO(intpin->io_intpin), low);
>>
>> The line above reprograms vector number AND _unmasks_ the pin (which was
>> specifically masked before reprogramming in ioapic_assign_cpu).
>> The lines below reprogram the destination LAPIC/CPU:
>>
>> value = ioapic_read(io->io_addr, IOAPIC_REDTBL_HI(intpin->io_intpin));
>> value &= ~IOART_DEST;
>> value |= high;
>> ioapic_write(io->io_addr, IOAPIC_REDTBL_HI(intpin->io_intpin), value);
>>
>> So a pending interrupt would be happily delivered to a wrong destination (new
>> vector + old lapic).
> 
>> I am not sure if just swapping these two blocks of lines would fix the 
>> issue, but
>> I hope that it would.  Could you please try that?
> 
> Yes I did and the first bootverbose run with your block switching patch
> was ok. I will do some more expansive tests next week.

Thank you very much.
I've committed this change to head.

-- 
Andriy Gapon
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