Hello all,
I'm trying to clean up the source tree for some software I'm writing.
The program itself is relatively simple, but is very fragmented; i.e. it
has a lot of source files. I'd like to write one top-level Makefile that
is able to find all of my source files, build the object files, and put
them into a separate directory. I'm thinking this can't be that
difficult, but I haven't figured it out yet.
I'm trying to use $(addprefix) build lists of source files and object
files containing the relative paths for each. The problem is that
$(addprefix) never seems to be evaluated. When I run 'make -p',
$OBJECT_LIST looks exactly like in does in my Makefile, which is listed
below. Fixes or pointers to a somewhat simple example greatly
appreciated...
Thanks,
-Andrew
#### Begin Makefile ####
## compiler settings
CC = gcc
OPTIONS = -Wall -g
## directory layout
BASEDIR = ../alice
SOURCEDIR = $(BASEDIR)/sources
OBJECTDIR = $(BASEDIR)/objects
DOCSDIR = $(BASEDIR)/documentation
## sources
SOURCES = main.c help.c status.c buffer.c device.c error.c insane.c
## objects
OBJECTS = main.o help.o status.o buffer.o device.o error.o insane.o
## lists containing paths
SOURCES_LIST = $(addprefix, $(SOURCEDIR), $(SOURCE))
OBJECTS_LIST = $(addprefix, $(OBJECTDIR), $(OBJECTS))
## targets
alice: $(OBJECT_LIST)
$(CC) $(OPTIONS) -o $@ $(OBJECT_LIST)
$(OBJECTS_LIST): alice.h
$(CC) $(OPTIONS) -c $(SOURCES_LIST)
clean:
rm -f $(OBJECTS_LIST) *.core alice;
#### End Makefile ####
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