https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=221845
--- Comment #3 from Russell Haley <russ.ha...@gmail.com> --- I've been following the code through and wound up at sys/arm/ti/cpsw/if_cpsw.c. cpsw_intr_rx is defined on line 1554. The function uses a macro called CPSW_RX_LOCK which is defined on line 349. The macro contains an assert on a transmit lock (tx.lock). I theorise the statement on line 350 is causing my exception? I also wonder if the lock being held between lines 1561 and 1570 is causing the delay in the bridge interface that is causing the original posters' slow throughput. Is it necessary to hold the lock until after the cpsw_write_4 on line 1569 or could it be performed outside the lock? -- You are receiving this mail because: You are the assignee for the bug. _______________________________________________ freebsd-net@freebsd.org mailing list https://lists.freebsd.org/mailman/listinfo/freebsd-net To unsubscribe, send any mail to "freebsd-net-unsubscr...@freebsd.org"
