Jack,
I'm trying to get some clarification on differences I'm finding between
the 82575 and 82576 parts with respect to interrupt moderation. The spec
I have for the 82576 (82576_Datasheet_v2p1.pdf) indicates that the
ITR algorithm is different than the one used (I don't have one of the
secret copies of the 82575 spec). The algorithm shown is
interrupts/sec = 1/(2 * 10-6sec x interval) (page 295, Section 7.3.4)
which is clearly wrong from practice. I have an 82576 (device id 10C9)
if I use the 125d setting in the example get just under 32000 interrupts
per second. Clearly your code doesnt implement this, nor do you have
different settings for the 82575 and 82576 parts. So I assume that the
same formula for the em parts hold for the igb parts, and that the
datasheet is wrong?
There does seem to be a slight difference. The setting that gets 1000
ints/second on the 82575 generates about 1020 on the 82576. Not a big
deal but I wonder why there's a difference? Is the reference clock for
these something that may not be fixed and could vary from board to
board? Note that both devices are on the same MB.
Also, it seems that settings to EITR over 32767 wrap on the 82576 (for
example writing 32768 to EITR is the same as writing a 1). So the minimum
setting on the 82576 is around 125 ints/second. The 82575 can accept
values up the 65535 before wrapping.
The 82576 document doesn't have a map of the register that I can find, so
Im curious as to whether these observations are something I can assume is
true across all parts and motherboards/cards, or is there some
implementation variance that will cause these to only apply to the ones
I happen to be testing?
Thanks,
Barney
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