:
:Matt Dillon wrote:
:> :What "this", exactly?
:> :
:> :That "virtual wire" mode is actually a bad idea for some
:> :applications -- specifically, high speed networking with
:> :multiple gigabit ethernet cards?
:> 
:>     All the cpu's don't get the interrupt, only one does.
:
:I think that you will end up taking an IPI (Inter Processor
:Interrupt) to shoot down the cache line during an invalidate
:cycle, when moving an interrupt processing thread from one
:CPU to another.  For multiple high speed interfaces (disk or
:network; doesn't matter), you will end up burining a *lot*
:of time, without a lockdown.

    Cache line invalidation does not require an IPI.  TLB
    shootdowns require IPIs.  TLB shootdowns are unrelated to
    interrupt threads, they only occur when shared mmu mappings
    change.  Cache line invalidation can waste cpu cycles --
    when cache mastership changes occur between cpus due to
    threads being switched between cpus.  I consider this a
    serious problem in -current.

                                        -Matt


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