(Personal CCs trimmed; back to Bernd and cross-posting -smp and -hackers)
> Date: Fri, 29 Jun 2001 21:18:18 +0200
> From: Bernd Walter <[EMAIL PROTECTED]>
> > Passing a token between threads. When a thread has the token, it may
> > assert a lock or a mutex on an object. Again, I subscribe to threads
> > being lightweight; cooperative sharing is better than preemptive or
> > trying to grab a lock before another thread does.
>
> A Token may not be enough because writes may be reordered.
> Usually a mutex is a lock with some kind of memory barrier.
But it _is_ locked. The
thread_with_token++ ;
thread_with_token %= num_threads ;
was oversimplified. It's more like
xorl %ecx,%ecx
movl thread_with_token,%eax
incl %eax
cmpl %eax,num_threads
movzl %ecx,%eax
lock movl %eax,thread_with_token
to pass the token, where thread_with_token is in shared memory. Each
process does the above. When a process has the token, it's safe to claim
mutexes and such without worry of another thread (without token) accessing
simultaneously. Mutex/lock ops also have lock asserted.
If this is inadequate, then I need to do some head-scratching.
> If you can fetch the lock on a CPU you know that the CPU previous
> owning the lock has flushed everything up to the point of coherence
> of what was written until the lock was released.
Here is where I want to learn more about cache coherency, inter-processor
interrupts, and APIC programming. I'd imagine that the latter two are
lower-level than I'd be using, but I still want to know the "how and why"
beneath the scenes.
> Memory barriers and the read-modify-write operations (or locked
> operations like on ALPHA) are accessible from user code - but I don't
> know of any platform independend functions.
Nor do I.
> > Any good references on MP standard? Is the lock prefix the only way to
> > force cache coherency?
>
> A good explanation for this kind of thing was in "Programming with POSIX
> Threads" in Chapter 3.4 "Memory visible between threads".
I'll have to check it out. I [believe that I] understand about the
inherent races in SMP, but more reading is always better...
However, I'm still interested in x86-specific coherency mechanisms. Any
info?
> I know you are not usung pthreads but the memory problems are the same.
Correct. I just wanted to make certain that we were on the same page, no
pun intended.
Eddy
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Date: Mon, 21 May 2001 11:23:58 +0000 (GMT)
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