On Saturday, November 20, 2010 3:38:58 pm Sergio Andrés Gómez del Real wrote: > If received an interrupt while in protected-mode and paging enabled, > is linear address from IDT stored at the idtr translated using the > paging-hierarchy structures? > I have looked at the interrupt/exception chapter in the corresponding > Intel manual but can't find the answer. Maybe I overlooked.
Yes. A linear address is the flat virtual address after segments are taken into account. It is the address used as an input to the paging support in the MMU. -- John Baldwin _______________________________________________ freebsd-hackers@freebsd.org mailing list http://lists.freebsd.org/mailman/listinfo/freebsd-hackers To unsubscribe, send any mail to "freebsd-hackers-unsubscr...@freebsd.org"
