> I've got some prototype code in place which supports the context > switching part of this. It's pretty simple right now, as I'm trying > to keep changes to a minimum. > > What I've done is simply added the dr0-dr3,dr6,dr7 registers to > 'struct pcb' in /usr/src/sys/i386/include/pcb.h. In cpu_switch(), > during a save operation, I load %dr7, and check the lower 8 bits, > which indicate if any breakpoints are in use. If they are, I save all > the debug registers, then clear out %dr7, which disables the > breakpoints. During a restore operation, I load the value of %dr7 > from the pcb structure of the new process, and if any of the lower 8 > bits are set, I restore all the debug registers. > > This is not as efficent as it could be implemented with a separate > flag to indicate whether saving the debug registers is necessary since > loading/storing the debug registers is fairly expensive (11 clocks on > an i486).
22 clocks on i386, 10 on i486, 11 on pentium. Also, on another topic, DRs are fairly portable as they've been a part of IA32 since i386. > Comments? I'm no expert on FreeBSD kernels, but I can speak for L4, and it's always good to look at past experiences in the area. (L4 is a very lean microkernel running on x86's, MIPS, (and soon Alphas and ARMs, although I'm currently in a process of convincing the authors of the later two to use BSD lincence instead of GPL ;) It currently claims to have the fastest IPC and lightweight thread implementation, so I guess it's a good raw model.