> > Level-triggered interrupts are persistent conditions, not queueable > > events. They typically require device-driver level intervention to be > > > > cleared. This is a major error in the PCI design (no surprises > > there). > > > [ML] Whoa there! That's the MAJOR advantage of PCI design. > Open collector, active low, level triggered interrupts are the only > possibility for interupt line sharing without programmatically > accessible registers on card which say "yes, I am still interrupting".
For a simplistic bus, perhaps. But an arbitrated token-delivery interrupt buslet with a bus-standardised interrupt state acknowledgement protocol would be much more efficient. PCI makes too many compromises to the PC's architecture; we're just about ready for a new bus again. > Active high, edge triggered interrupts are an abomination (there > is no way to reliably share the interrupt line and you cannot even wire > or it). They are the reason why one never has enough interrupt lines on > ISA. I don't believe I ever suggested that this was the only alternative technique, and I'm certainly on record as not liking it either. -- \\ The mind's the standard \\ Mike Smith \\ of the man. \\ [email protected] \\ -- Joseph Merrick \\ [email protected] To Unsubscribe: send mail to [email protected] with "unsubscribe freebsd-hackers" in the body of the message
