Bakul Shah writes: > Not changing random() was of real concern to me when I was > doing chip simulations. ASIC design verification folks won't > be happy if the rug is pulled out from under them. In > general crypto and simulation needs are different and I don't > trust the crypto guys to look out for the simulation guys!
Are you a Verilog guy ar a VRML guy? Something else maybe? M -- Mark Murray iumop ap!sdn w,I idlaH To Unsubscribe: send mail to [EMAIL PROTECTED] with "unsubscribe freebsd-current" in the body of the message