[PATCH] XOR uses

[Michael McConville]

A minor simplification patch:


Index: sys/arm/allwinner/a10_gpio.c
===================================================================
--- sys/arm/allwinner/a10_gpio.c        (revision 291978)
+++ sys/arm/allwinner/a10_gpio.c        (working copy)
@@ -356,10 +356,7 @@
        sc = device_get_softc(dev);
        A10_GPIO_LOCK(sc);
        data = A10_GPIO_READ(sc, A10_GPIO_GP_DAT(bank));
-       if (data & (1 << pin))
-               data &= ~(1 << pin);
-       else
-               data |= (1 << pin);
+       data ^= (1 << pin);
        A10_GPIO_WRITE(sc, A10_GPIO_GP_DAT(bank), data);
        A10_GPIO_UNLOCK(sc);
 
Index: sys/arm/altera/socfpga/socfpga_gpio.c
===================================================================
--- sys/arm/altera/socfpga/socfpga_gpio.c       (revision 291978)
+++ sys/arm/altera/socfpga/socfpga_gpio.c       (working copy)
@@ -336,10 +336,7 @@
 
        GPIO_LOCK(sc);
        reg = READ4(sc, GPIO_SWPORTA_DR);
-       if (reg & (1 << i))
-               reg &= ~(1 << i);
-       else
-               reg |= (1 << i);
+       reg ^= (1 << i);
        WRITE4(sc, GPIO_SWPORTA_DR, reg);
        GPIO_UNLOCK(sc);
 
Index: sys/arm/rockchip/rk30xx_gpio.c
===================================================================
--- sys/arm/rockchip/rk30xx_gpio.c      (revision 291978)
+++ sys/arm/rockchip/rk30xx_gpio.c      (working copy)
@@ -375,10 +375,7 @@
                return (EINVAL);
        RK30_GPIO_LOCK(sc);
        data = RK30_GPIO_READ(sc, RK30_GPIO_SWPORT_DR);
-       if (data & (1U << pin))
-               data &= ~(1U << pin);
-       else
-               data |= (1U << pin);
+       data ^= (1U << pin);
        RK30_GPIO_WRITE(sc, RK30_GPIO_SWPORT_DR, data);
        RK30_GPIO_UNLOCK(sc);
 
Index: sys/arm/samsung/exynos/exynos5_pad.c
===================================================================
--- sys/arm/samsung/exynos/exynos5_pad.c        (revision 291978)
+++ sys/arm/samsung/exynos/exynos5_pad.c        (working copy)
@@ -722,10 +722,7 @@
 
        GPIO_LOCK(sc);
        reg = READ4(sc, bank.port, bank.con + 0x4);
-       if (reg & (1 << pin_shift))
-               reg &= ~(1 << pin_shift);
-       else
-               reg |= (1 << pin_shift);
+       reg ^= (1 << pin_shift);
        WRITE4(sc, bank.port, bank.con + 0x4, reg);
        GPIO_UNLOCK(sc);
 
Index: sys/dev/nand/nandsim_ctrl.c
===================================================================
--- sys/dev/nand/nandsim_ctrl.c (revision 291978)
+++ sys/dev/nand/nandsim_ctrl.c (working copy)
@@ -388,9 +388,6 @@
        rand = random();
        if ((rand % 1000000) < chip->error_ratio) {
                bit = rand % 8;
-               if (*byte & (1 << bit))
-                       *byte &= ~(1 << bit);
-               else
-                       *byte |= (1 << bit);
+               *byte ^= (1 << bit);
        }
 }
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