> >>The panic occurs at 'swtch_com+0x6e: ltr %si'. At the time, %si is
> >>0x20, which indexes to what appears to be a busy tss (type=01011b)
> >>with a limit of 0x67. That instruction generates a general protection
> >>fault with an error code of 0. The current process was Idle.
>
> The busy tss seems to be the only problem. The busy bit in the tss
> descriptor should be clear when the ltr instruction is executed, because
> the descriptor has just been copied from an image whose busy bit is clear.
> This was broken in rev.1.332 of machdep.c by moving the initialisation
> of common_tssd to after the first ltr instruction, so that the busy bit
> in common_tssd is set.
>
> Bruce
>
> diff -c2 machdep.c~ machdep.c
> *** machdep.c~ Sat Jun 26 21:41:33 1999
> --- machdep.c Sun Jun 27 15:52:07 1999
> ***************
> *** 1643,1651 ****
> common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
> common_tss.tss_ioopt = (sizeof common_tss) << 16;
> - gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
> - ltr(gsel_tss);
> - private_tss = 0;
> tss_gdt = &gdt[GPROC0_SEL].sd;
> common_tssd = *tss_gdt;
>
> dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
> --- 1643,1651 ----
> common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
> common_tss.tss_ioopt = (sizeof common_tss) << 16;
> tss_gdt = &gdt[GPROC0_SEL].sd;
> common_tssd = *tss_gdt;
> + private_tss = 0;
> + gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
> + ltr(gsel_tss);
>
> dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
>
Yes, it was my mistake, I'll fix it.
-lq
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