Jonas Maebe wrote:
On 07 Oct 2013, at 11:33, Marco van de Voort wrote:
In our previous episode, Jonas Maebe said:
[interlocked increment/decrement]
They do not include any memory barrier. The only thing those routines
guarantee on all platforms, is that the value is atomically
incremented/decremented.
(btw that depends on which functions you mean, our own assembler versions
probably.
The Windows
functions of the same name are guaranteed to have memory barriers afaik,
but do require alignment. (probably to avoid crosssing cache lines)
)
That's why I wrote "on all platforms". They also always require a native
alignment on all platforms, because those are cpu limitations for atomic
instructions.
On 07 Oct 2013, at 11:40, Mark Morgan Lloyd wrote:
Thanks Jonas, noted. For completeness, is there a way to force one?
See http://www.freepascal.org/docs-html/rtl/system/readwritebarrier.html
and the pages linked from there.
Thanks for that, I mistakenly thought that the code generator was
inserting implicit membars but I see from my notes relating to bug 23390
that it's an RTL (>2.2.2) detail.
--
Mark Morgan Lloyd
markMLl .AT. telemetry.co .DOT. uk
[Opinions above are the author's, not those of his employers or colleagues]
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