The easiest way to do interrupt processing in Cortex-M3 processors(which
I assume you are using), is to create an interrupt vector table in SRAM
and then change the NVIC to use that. That way you can point to the
interrupt handlers at runtime.
It's true that the normal way of doing it is with weak linking as you
write, but there's no support for that directly in FPC currently, so
it'll have to be done with external assembly. It is doable, but noone
has made it entirely yet.
Den 10-05-2012 13:56, Koenraad Lelong skrev:
Hi,
I'm working on an embedded-arm application. I do want to use
interrupts but I don't find how to easily setup the interrupt-handlers.
In the startup code in C, I see default handlers defined with the
keyword WEAK. Looking around, I found that this means that if one
defines a function with the same name, that will be used instead of
the default-handler. The start-address of that new function will be
entered in the interrupt-vector table in flash.
Is something similar possible with fpc ? Looking in the
fpc-startup-code, the rtl, I don't see that, but that could be me.
Or do I have to modify the rtl for every project I will be making ?
What I did see I think, in some rtl-units for arm-embedded, is that
there seems to be a contruction to put the start-address of the main
error-handlers in RAM. Would that be the only way to have interrupts ?
Thanks for any help,
Regards,
Koenraad Lelong.
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