In our previous episode, Jonas Maebe said: > > I use own lockfree FIFO http://www.emadar.com/fpc/lockfree.htm to > > distribute task between threads > > its much faster and well scaling on multicore. > > Note that it won't work as is on non-x86 machines, because it's > missing memory barriers (and I think that you may actually need memory > barriers on x86 too). Atomic operations are not memory barriers by > themselves, and the fact that you perform an atomic operation does not > mean that afterwards all cpu's will immediately see this new value.
Afaik memory barriers (s/lfence etc) are only needed for I/O mapped memory on x86. But if you look at the MSDN help for interlocked* functions, you'll seean additional requirement that the arguments are 4-byte aligned. (which might be a requirement of the lock prefix). _______________________________________________ fpc-pascal maillist - fpc-pascal@lists.freepascal.org http://lists.freepascal.org/mailman/listinfo/fpc-pascal
