Mark Morgan Lloyd schrieb:
Hans-Peter Diettrich wrote:
Mark Morgan Lloyd schrieb:
Question (to save me digging into the manuals right now): where a
recent machine uses the dedicated stack instructions, is the stack
pointer one of the standard registers? In other words, can push/pop
operations be trivially and exactly simulated for older hardware?
You mean thread safety?
No, I meant that Bernd suggested R1 earlier as a simulated stack
pointer. Does IBM use R1 for this on variants of the architecture that
have push/pop opcodes, or some other general-purpose register, or a
dedicated register?
Dunno, sorry. Perhaps a new register has been introduced with the new
instructions?
As long as only one thread is running, the push/pop instructions must
not be atomic.
I hate to correct language usage, but "/need/ not be atomic" would be
clearer.
Much appreciated :-)
DoDi
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